HSIO Validation Engineer, Annapurna Labs Machine Learning Acceleration

Description

• As an HSIO Validation Engineer, you will be responsible for ensuring the correct operation, bring-up, and scalability of high-speed I/O including PCIe, HBM, UCIe, and other protocols used in our custom

Description

• As an HSIO Validation Engineer, you will be responsible for ensuring the correct operation, bring-up, and scalability of high-speed I/O including PCIe, HBM, UCIe, and other protocols used in our custom machine learning chips. You will work with architecture, IP owners, DV, software, and signal integrity teams to productize the latest high-speed I/O technology in both pre-silicon and post-silicon. Key job responsibilities -Gain a deep understanding of SoC architecture. -Work with architecture, IP owners, DV, software, and signal integrity teams to verify and integrate high-speed I/O functionality and performance. -Execute feature enablement and validation test cases for high-speed interfaces. -Develop and maintain software-based validation tests and automation frameworks for both pre-silicon and post-silicon environments. -Debug and drive root-cause analysis for device-related issues; document failure analysis and report test progress. -Drive robust, scalable, and stable high-speed I/O configurations for machine learning applications.

Basic Qualifications

• - Bachelor's degree in Electrical Engineering or a related field - Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills - Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing

Preferred Qualifications